The STAR Act of 2025 amends Internal Revenue Code section 48D to let eligible taxpayers claim a 25% tax credit for qualified semiconductor design expenditures in addition to the existing 25% credit for investment in advanced manufacturing facilities. The bill defines two buckets of design spending — in‑house (wages, supplies, limited computer usage) and contract (payments to nonemployees) — and limits qualifying activity to design conducted in the United States (including U.S. possessions).
This change targets the U.S. semiconductor value chain by subsidizing the development of chip designs and related intellectual property domestically rather than just factory construction. For tax and compliance teams, the bill creates new definitional work (what counts as qualifying design, how to treat prepaid contract payments, and aggregation rules) and an explicit bar on double‑claiming the same expenditures under the section 41 research credit.
The provision is effective on enactment and sunsets for qualifying design expenditures after December 31, 2036.
At a Glance
What It Does
The bill amends section 48D so the advanced manufacturing investment credit equals 25% of qualified facility investment plus 25% of qualified semiconductor design expenditures paid or incurred by the taxpayer in the taxable year. It adds a new definition of 'qualified semiconductor design expenditures' that includes in‑house wages and supplies and contract design payments for qualifying design performed in the U.S.
Who It Affects
U.S. semiconductor designers and chip companies that perform design activities domestically, contract design houses and third‑party design vendors, investors in semiconductor startups, and tax departments that prepare credits under section 48D and section 41. The IRS and tax preparers will also face new administrative and audit tasks.
Why It Matters
This is a targeted tax incentive aimed at growing domestic chip IP and design capacity rather than only subsidizing plant construction. It changes tax treatment for wage and service-based design work, creates coordination rules with the R&D credit, and introduces a material new compliance burden around activity definitions, allocation, and timing.
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What This Bill Actually Does
Rather than merely expanding tax support for factories, the bill brings semiconductor design spending explicitly into the advanced manufacturing investment credit. Practically, an eligible taxpayer can claim a 25% credit on two different bases in a taxable year: (1) capital investment in qualifying advanced manufacturing facilities and (2) qualified semiconductor design expenditures.
The legislature distinguishes between design work done by employees (in‑house) and work bought from contractors, and treats them differently for calculation and timing.
In‑house design expenses are limited to wages for 'qualified services' (the design work itself or direct supervision/support), supplies as defined for the R&D credit, and, under future Treasury regulations, amounts paid to use computers for design — although the bill blocks double counting where both the taxpayer and an affiliated person pay for substantially identical property. Contract design expenses count at 100% of the payment to a nonemployee and include rules to treat prepaid sums as attributable to the period when the work actually occurs.Qualifying design must be development of product design, specifications, trade secrets, technology or other IP for semiconductor manufacturing and must involve elements of experimentation to create new or improved function, performance, reliability, or quality.
Activities that are purely cosmetic, routine QA/testing, reverse engineering from a product or public materials, or market research are explicitly excluded. The statute confines qualifying work to the United States (including possessions) and applies aggregation rules similar to section 41(f)(1) so related entities must consolidate expenditures for the credit calculation.To prevent a 'double dip', the bill disallows taking the same qualified semiconductor design expenditures into account when determining the regular research credit under section 41.
The credit and the new design component are effective for amounts paid or incurred after enactment, and the legislation sets a statutory sunset: qualified semiconductor design expenditures cease to qualify after December 31, 2036. There is also a narrow startup exception that treats certain pre‑commercial design spending as meeting the 'trade or business' requirement when the principal purpose is to use the design in a future business of the taxpayer or aggregated persons.
The Five Things You Need to Know
The amended section 48D makes the credit equal to the sum of 25% of qualified advanced manufacturing facility investment plus 25% of qualified semiconductor design expenditures for the taxable year.
In‑house design costs that qualify include wages for 'qualified services', supplies (as defined in section 41(b)(2)(C)), and, subject to Treasury regulation, amounts paid for the right to use computers for design.
Contract design expenses qualify at 100% of amounts paid to nonemployees, with prepaid contract payments allocated to the period when the design work is actually performed.
The bill expressly bars counting the same expenditures for both the new 48D design component and the section 41 research credit.
The new design component is effective on enactment but sunsets for qualified semiconductor design expenditures on December 31, 2036.
Section-by-Section Breakdown
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Short title
Designates the act as the 'Semiconductor Technology Advancement and Research Act of 2025' or 'STAR Act of 2025'. This is purely titular but frames the congressional intent that the measure targets semiconductor technology and research.
Expands 48D credit calculation to include design expenditures
Rewrites 48D(a) so the credit for an eligible taxpayer equals the sum of two 25% credits: (1) 25% of qualified investment in an advanced manufacturing facility and (2) 25% of qualified semiconductor design expenditures paid or incurred in the taxable year. Practically, taxpayers must compute and aggregate two separate bases to arrive at the allowable credit, which increases bookkeeping and allocation work for tax departments that previously tracked only capital investment.
Defines 'qualified semiconductor design expenditures' and breaks them into in‑house and contract categories
Creates a multi-part definition. In‑house expenditures include wages for employees performing qualified services and supplies; computer‑use payments may qualify under Treasury regulations, but payments are disallowed to the extent an affiliate receives payment for substantially identical property. Contract design expenses count the full amount paid to nonemployees; prepaid amounts are matched to the period the design occurs. The provision also includes an aggregation rule (modeled on section 41(f)(1)) and treats the U.S. (including possessions) as the geographic boundary for qualifying activities.
Substantive scope: qualifies experimental design that improves function/performance/reliability; startup treatment
Qualifying design must be development or direction of product design, specifications, trade secrets, or other IP that constitutes elements of experimentation to produce a new or improved function, performance, reliability, or quality. The statute carves out nonqualifying activity such as style/cosmetic work, post‑commercialization design (with narrow exceptions), reverse engineering from products or public specs, and market research or routine QA. The bill also relaxes the 'trade or business' requirement for certain startup ventures, allowing pre‑commercial in‑house design spending to qualify if its principal purpose is to be used in a future business of the taxpayer or aggregated persons.
Prevents double‑counting with section 41 and sets an expiration date
Adds a rule that qualified semiconductor design expenditures used to claim the 48D design component may not be used again to compute the section 41 research credit. It also sets an explicit end date: neither the facility component nor the design component applies for qualifying events beginning after December 31, 2036. This creates a fixed policy window for the incentive and requires taxpayers and planners to consider the sunset in investment timing.
Technical fix to 56A and application on enactment
Makes a conforming cross‑reference change in section 56A(c)(9) to reflect the redesignation of subsections and states that the amendments apply to amounts paid or incurred after the date of enactment. The immediate effective date means transactions after enactment will need contemporaneous documentation and tracking under the new rules.
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Explore Finance in Codify Search →Who Benefits and Who Bears the Cost
Every bill creates winners and losers. Here's who stands to gain and who bears the cost.
Who Benefits
- U.S. semiconductor design teams and chip companies — They receive a direct 25% tax offset on qualifying domestic design wages and supplies, improving after‑tax returns on design investments and lowering the marginal cost of hiring design talent.
- Contract design houses and third‑party IP vendors — Payments to nonemployee designers qualify 100% as contract design expenses, increasing demand for U.S.-based contract design services and improving vendor competitiveness versus offshore providers.
- Startups focused on semiconductor IP — The startup trade‑or‑business exception lets certain pre‑commercial in‑house design spending qualify, effectively improving early‑stage economics and potentially enlarging the pool of investable semiconductor IP ventures.
- Investors and corporate tax planners — The credit changes project returns on design‑intensive business models and will factor into valuation, M&A structuring, and decisions about locating design work in the U.S.
- Domestic semiconductor ecosystem (ecosystem effects) — Expanding incentives to design as well as facilities may strengthen local IP creation, downstream manufacturing synergies, and tech clustering.
Who Bears the Cost
- U.S. Treasury (budgetary cost) — The extension of a 25% credit to labor‑ and service‑based design payments increases outlays (or reduces tax receipts) compared with the prior statute; the bill contains no offsets.
- Companies that operate multinational design networks — Firms with design teams outside the U.S. may face higher effective tax burdens if they cannot re‑site or restructure design activities to capture the credit, or they may incur relocation costs to claim credits.
- Tax departments and preparers — New recordkeeping, allocation, and compliance obligations for tracking qualifying wages, supplier invoices, prepaid contracts, and nexus determinations will increase administrative burden.
- IRS administration and auditors — The agency will need to develop guidance, templates, and audit procedures to police subjective boundaries like 'elements of experimentation' and to enforce aggregation rules, increasing enforcement workload.
- Non‑design parts of the semiconductor supply chain — Entities that do not perform qualifying design (e.g., commodity component suppliers, some software vendors) do not benefit directly and may see competitive shifts as design activity concentrates domestically.
Key Issues
The Core Tension
The bill balances two legitimate goals — aggressively incentivizing domestic semiconductor IP and design capacity versus keeping the tax code administrable and fiscally responsible — but the more narrowly you define qualifying design (to limit cost and abuse), the less attractive the incentive becomes for complex, multidisciplinary design work; conversely, a broad definition captures more activity but risks substantial revenue loss and enforcement complexity.
The bill uses conceptually familiar R&D language (experimentation, supplies, aggregation) but applies those ideas to the specialized field of semiconductor design. That invites practical ambiguity: distinguishing qualifying experimental design from routine engineering, firmware updates, or manufacturing process tweaks will require detailed guidance.
The statute excludes reverse engineering and market studies, but taxpayers and auditors will still face hard line‑drawing questions where design draws on existing public materials or incremental improvements. Treasury regulations on 'the right to use computers' are explicitly left to future rulemaking, creating immediate uncertainty about cloud costs — a major cost item in modern chip design.
The startup 'trade or business' exception lowers the entry barrier for early projects, but it could be exploited by closely held groups that claim pre‑commercial design spending without a clear path to commercialization. The coordination rule preventing dual use of the same expenditures between 48D and section 41 avoids an obvious double‑claim, but it also forces taxpayers to choose which credit produces the largest benefit and requires allocation methodologies when an expense contributes to both qualifying design and broader R&D.
Finally, the sunset date (December 31, 2036) creates a finite incentive window that may drive timing distortions — firms could accelerate or delay projects to capture the credit, and the legislative end date raises questions about long‑term planning for workforce and IP investments.
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